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Panel, Conference Presentation

Arm, PsiQuantum, Intel, NextSilicon, Lightspeed: Moore’s Law vs AI’s Appetite The Compute Collision

  • Moore's Law Trajectory and Current Limits

    • Transistor density scaling (doubling every ~2 years) has slowed; Intel has reached 18A (1.8nm) production with the "Panther Lake" CPU.
    • Physical limits on logic scaling were observed at 7nm; memory scaling has stalled at 2nm and beyond, requiring new materials and architectures.
    • Intel projects a 15% performance increase from 18A manufacturing innovations (gate-all-around, power vias), while power consumption and heat management remain critical constraints.
    • Jean-Luc Philippe (Intel) and Will Abbey (ARM) emphasize that hardware alone cannot solve AI compute demands; software-hardware co-design is now essential for efficiency.
  • Edge vs. Cloud Compute Debate

    • Edge Computing Arguments:
      • Inference at the edge (local on laptops/phones) reduces latency, data transfer, and power consumption compared to cloud dependency.
      • ARM highlights 300 billion devices at the edge, asserting that power efficiency is a "scarce commodity" necessitating first-principle design for endpoints.
      • Intel demonstrates local execution of RAG (Retrieval-Augmented Generation) on Core Ultra laptops using NPUs consuming milliwatts.
    • Cloud/Center Arguments:
      • Elad (Next Silicon) argues that complex tasks (deep research, reasoning) require "frontier models" and massive compute power available only in data centers.
      • Pete Chabot (PsiQuantum) notes that while edge is inevitable, the "grand" value is forged in massive, uncomfortable realities like building nuclear-power-adjacent supercomputers and error-corrected quantum systems.
      • Future models will likely grow in complexity and size, requiring hybrid architectures rather than a shift solely to smaller, edge-optimized models.
  • Hardware Architecture Strategies

    • Next Silicon's Approach:
      • Focuses on "future-proof" acceleration for high-performance computing (HPC) science code rather than training chips for specific, volatile model architectures (e.g., Transformers vs. future unknowns).
      • Estimates custom chip design costs ~$150M plus hundreds of millions for ecosystem software, necessitating significant time (3 years) before production readiness.
      • Advocates for hardware that can accelerate any future math/algebra invented, avoiding obsolescence as model types shift.
    • Quantum Computing Progress (PsiQuantum):
      • Major milestone: Active error correction in real quantum processors has been achieved by multiple teams, debunking previous skepticism about feasibility.
      • PsiQuantum is manufacturing quantum chips on a tier-one foundry line (similar to silicon wafers) and has secured ~$1B in non-dilutive government support for sites in Australia and Chicago (~100MW capacity each).
      • Timeline: Aiming to build 100MW-scale systems faster than conventional expectations, moving away from "benchtop" prototypes to industrial-scale deployment.
    • Heterogeneous Computing Consensus:
      • Will Abbey (ARM) and Jean-Luc Philippe (Intel) agree on a "compute subsystem" approach: general-purpose CPUs for orchestration, GPUs/accelerators for specific workloads, and custom silicon for known high-volume tasks.
      • Pete Chabot (PsiQuantum) maintains that universal, error-corrected quantum computers will win over niche, application-specific quantum designs, drawing parallels to the abandonment of three-state logic.
  • Software and Ecosystem Priorities

    • The CUDA Precedent:
      • Success in AI hardware relies heavily on the ecosystem; NVIDIA's CUDA is cited as the benchmark for a "fact of life" developer environment.
      • Next Silicon invested seven years in a self-reconfiguring chip designed to be a drop-in replacement for CUDA to avoid forcing developers to rewrite entire software stacks.
    • Post-Quantum Readiness:
      • Intel warns that organizations must implement post-quantum cryptography now, as current encryption will be vulnerable when error-corrected quantum computers become operational within a decade.
      • The industry is urged to co-design software for current NPUs/GPUs alongside future QPUs to avoid a security crisis.
    • Investment and Adoption Trends:
      • Lightspeed (Pete Chabot) observes that technical breakthroughs in hardware are insufficient without developer adoption and robust ecosystem support.
      • Venture capital is increasingly scrutinizing "future-proofing" of hardware to ensure assets don't become obsolete upon release due to rapid shifts in AI model architecture.
  • Forward-Looking Statements and Warnings

    • Inevitability of Change: Pete Chabot states that belief in quantum computing happening within a lifetime is correct; historical precedent (vacuum tubes to transistors) proves arithmetic foundations can be completely upended.
    • Cost of Innovation: Building value at the AI frontier requires billions in capital and decades of work, rejecting "free lunch" narratives; value is forged through immense infrastructure investment (power plants, cryostats, fabs).
    • Architectural Shifts: RISC-V is identified as a future trend for general-purpose computing, but CPUs remain mandatory for serial execution while accelerators handle parallel workloads.
    • Industry Consensus: All panelists agree that the "end of Moore's Law" is not a stop sign but a catalyst for fundamental architectural innovation rather than brute-force transistor scaling.