IMEC Says Today’s AI Will Look Ancient in 10 Years

Current State of Semiconductor Scaling

• The industry is plateauing at the limits of Moore's Law, with transistors reaching depths of approximately one nanometer (100,000 times smaller than a human hair).
• IMEC, a 40-year-old Belgian research entity, leads the pre-commercialization phase for next-generation chips, a 5-to-10-year process where over 90% of modern chips originate in design.
• Future scaling requires a shift from physical miniaturization to inventive hardware architecture, as physics limits prevent further traditional transistor shrinking.

Critical Bottlenecks in AI Infrastructure

• Memory Scarcity: Only three companies (Micron, SK Hynix, Samsung) control 95% of the memory market; two are based in Korea.
• Price Volatility: Memory chip prices surged by 700% this year due to hyperscalers acquiring entire inventories and supply constraints.
• Power & Cooling: Energy capacity is a primary constraint; the industry trend over the next 5–10 years involves moving liquid cooling systems closer to the GPU.
• Data Transfer: Copper wiring is approaching obsolescence ("met its days"), prompting a shift toward photonics to handle data volume and reduce heat generation.

Shifts in AI Model Strategy and Hardware Value

• End of Scaling Hypothesis: The strategy of building ever-larger models is slowing; open-source models like Kimi K3 already exceed human brain parameter counts but remain 1,000,000 times less energy-efficient than the human brain.
• Value Redistribution: The industry is shifting from a software-heavy model to a hardware-first "renaissance" due to software margins being eroded by AI token spend and hardware margins remaining robust.
• Architecture Evolution: Future value will concentrate on manufacturing specialized components (e.g., memory bandwidth, low latency) rather than just increasing parameter counts.
• GPU Dominance: GPUs remain dominant for training, but the inference layer is where significant bottlenecks and innovation opportunities currently exist.

Emerging Technologies: Photonics and Copackaged Optics

• Technology Shift: Photonics is identified as the "killer technology" for future chips, transferring data faster and more efficiently while eliminating the heat generation associated with electrons and copper.
• Deployment Timeline: Currently, optical components exist between clusters; over the next five years, they will integrate directly with GPUs, evolving into copackaged optics.
• Multi-Benefit Solution: Photonics simultaneously addresses energy efficiency, cooling requirements, and data transfer latency.
• Future Architecture: As AI algorithms diversify into world models and reinforcement learning, hardware will require increased specialization beyond standard GPU designs.

Strategic Outlook and Investment Themes

• Timeline Forecast: The current iteration of AI, characterized by brute-force large language models, will be viewed as "old-fashioned" in 10 years.
• Software-Hardware Integration: Significant software evolution is expected, but it will be inextricably tied to new hardware architectures, with software value increasing only as hardware matures.
• Founding Profile: Successful founders in this sector often possess a "dichotomy" of academic/technical rigor from Europe and business acumen from the US.
• Manufacturing Bottleneck: The primary constraint on chip proliferation is not the number of design companies, but the global capacity to manufacture specific, diverse components in appropriate regions.