The Democratization of Engineering | Sassine Ghazi, Synopsys | RAISE Summit 2026

Synopsys Market Positioning & Strategy

• Synopsys provides essential engineering tools for chip design, with CEO Sasan Ghazi stating that "there is no chip today that is designed without Synopsys."
• The company expanded its scope from pure silicon-level tools to full "silicon-to-systems" solutions following its acquisition of ANSYS.
• The ANSYS acquisition, completed one year prior to the interview, enables co-design of electronics with physics (thermal, electromagnetic, fluid, structural) to optimize performance and reduce costs.

AI Infrastructure & Chip Architecture Trends

• The industry is shifting from general-purpose chips (dominated by NVIDIA in HPC) toward specialized architectures optimized for cost, energy efficiency, and throughput during the inference phase.
• Three primary chip architecture models currently coexist: general-purpose chips, ASICs (e.g., delivered by Broadcom), and Customer-Owned Tooling (COT) where hyperscalers build custom silicon.
• Chip design is evolving from monolithic structures to heterogeneous architectures, packaging memory, compute, and networking as modular "Lego blocks" within advanced packages to ensure supply chain flexibility.
• Multiple innovation pathways are emerging to balance performance, power, and bandwidth, including High Bandwidth Memory (HBM) stacks and alternative architectures using SRAM.

Energy Efficiency & Co-Design Innovations

• Data center energy consumption is being addressed through cross-domain co-design, allowing hyperscalers to reduce engineering margins (and associated costs) by simulating complex physical interactions digitally before prototyping.
• The industry is moving toward creating high-fidelity "digital twins" that model multiple engineering domains to optimize the entire stack, from the power grid down to the silicon.
• ANSYS is positioned as the leader in multi-physics simulation, critical for ensuring safety and operational correctness in "physical AI" systems like robots and EVs.

AI Integration in Chip Design Workflows

• Synopsys deployed reinforcement learning techniques in 2017 to tame the optimization complexity of chip design, which is now impossible for humans to navigate manually.
• Current workflows feature 6–8 AI agents capable of handling front-end design tasks (similar to software coding generation) and validation.
• Physical implementation of chips still requires significant human intervention, though Ghazi predicts this is accelerating faster than anticipated.
• The industry has advanced from early AI integration to an "L4" autonomous level in chip design, where cognitive layers can reason and orchestrate multiple agents to perform tasks.

Supply Chain Constraints & Market Cycles

• Demand for advanced silicon is surging to support physical AI, but the market faces severe constraints in logic and memory wafer capacity.
• Companies like Tesla anticipate that by 2030, available wafer capacity will be insufficient to meet the projected demand for EV and robotics silicon.
• The semiconductor market is bifurcating: an AI infrastructure sector experiencing a boom with supply shortages, and a traditional analog/sensor sector recovering from a downturn due to rising physical AI needs.
• Historical memory market cycles (3–4 years) are prolonging as sustained demand from advanced silicon sectors prevents traditional troughs from occurring as sharply.

Future Outlook & "Next Big Idea"

• Synopsys is focusing on three strategic pillars: embedding AI into every step of the design workflow, co-designing across multiple engineering domains, and creating accurate high-fidelity digital representations for manufacturing.
• Robotics and embodied AI systems are already in existence, with the immediate challenge being cost reduction rather than technological feasibility.
• Future innovations aim to reduce expensive manufacturing iterations by ensuring high-fidelity digital models translate directly to physical production.