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Microchip Technology, in Collaboration With Micron Technology, Demonstrates High-Performance PCIe® Gen 6 Storage Architecture for AI and Data Center Infrastructure

MCHP
  • Microchip Technology demonstrated an end-to-end PCIe Gen 6 storage architecture using Switchtec Gen 6 switches & Micron 9650 NVMe SSDs at the 2026 Future of Memory and Storage conference.
  • The architecture enables higher data throughput, reduced latency, & scalable connectivity for AI, high-performance computing, & cloud data center workloads.
  • The Switchtec Gen 6 PCIe fanout switch acts as a high-bandwidth, low-latency interconnect allowing Micron 9650 SSDs to operate at full Gen 6 speed.
  • The solution supports composable & disaggregated system designs, allowing data center architects to scale storage resources efficiently while maintaining predictable performance.
  • PCIe 6.0 doubles the bandwidth of PCIe 5.0 to 64 GT/s per lane to address the increasing data volume demands of complex AI models.
  • The Micron 9650 is the industry's first mass-produced PCIe Gen 6 SSD designed for data-intensive workloads such as AI training, real-time analytics, & large-scale databases.
  • Microchip Switchtec Gen 6 switches utilize 3 nm process technology & support high lane counts, advanced error containment, comprehensive diagnostics, & multicast functionality.
  • The switches ensure reliable data movement & system resilience while optimizing power consumption in demanding computing environments.
  • Security features include a hardware root of trust, secure boot architecture, & post-quantum-safe cryptographic algorithms meeting CNSA 2.0 standards.
  • The collaboration highlights the importance of a cohesive ecosystem between switching & storage components to enable scalable, high-bandwidth architectures for next-generation platforms.