Matt Godbolt: Advanced Skylake Deep Dive

Matt Godbolt, a prominent C++ developer transitioning to HRT, presents a detailed reverse-engineered analysis of the Skylake-era CPU microarchitecture based on community findings rather than official documentation. The talk dissects critical pipeline stages including the front-end's instruction decoding, the micro-op cache limitations, and the complex register renaming mechanics that define the processor's performance characteristics. Key revelations include specific hardware flaws like the Loop Stream Detector bug, port allocation strategies, and the diminishing returns of increasing architectural register counts compared to the hundreds of physical registers already available.